pccx — Bare-Metal Transformer Accelerator on Kria KV260
An open-source SystemVerilog NPU project building a bare-metal transformer accelerator for experimental Gemma-class LLM inference on an AMD/Xilinx FPGA board.
This repository is the board-integration application of the pccx open semiconductor project, targeting Gemma-class LLM acceleration on the AMD/Xilinx Kria KV260 FPGA board. It hosts board integration, bare-metal driver source, application wiring, and the Vivado and simulation wrappers that consume a separately versioned, pinned reusable LLM IP core.
The project publishes an explicit evidence checklist of its current status: simulation passes and RTL synthesis is timing-closed, but post-implementation timing recovery is still in progress, and bitstream generation, board execution, and full model-runtime wiring have no evidence yet. Status is public alpha, described as not a production bitstream release, with the reusable IP core, verification evidence and a related research project tracked in separate repositories.
The project's architecture, instruction set and model-mapping documentation are published on a separate site; this repository implements what that specification describes. It is initiated and operated by Altifigence.